Modern electronic devices, especially semiconductor (SC) devices and integrated circuits (ICs) often employ multiple SC devices on the same semiconductor substrate or die. It is often desired to provide electrical isolation between the various SC devices on the same SC substrate. Dielectric lined trenches are often employed for this purpose. As the operating voltage and device density (devices per unit area) on the SC substrate increase it often becomes more difficult to maintain the desired device breakdown voltage. Further, there is often a tendency for the distribution of breakdown voltages observed across a die or wafer to widen with increased packing density, which can lead to lower manufacturing yields. Accordingly, there is an ongoing need to provide more robust isolation arrangements for SC devices and ICs.